Scripting Languages, Perl, Tcl, Physical Verification sign-off flows and tools, PDK concepts, Physical Design implementation flow, Fusion Compiler, Foundry PDKs, ICC2, SVRF rule decks, Calibre, Innovus, ICV, Design Rules, Mixed-signal SOC environments, Backend design methodologies, Tech LEF, Custom IC design flows, Layouts, ESD reliability analysis, PERC methodologies

IC Validator, Physical Verification, Calibre ICV, pegasus, DRC, ESD Verification, LVS, 3D IC Design

PV fixing, Esd, DRC, Innovas

Perl, Python, Tcl, Siemens Calibre, PERC, Calibre Interactive, TVF, Cadence Pegasus, EDA visualizer, LVS, CalibreDRV, Calibre DesignRev scripting, DRC, Tk, design for manufacturing, Cadence Virtuoso, SVRF