Servicenow, Logic Optimization, power management, Digital circuit design, Simulation and verification methodologies, Timing Analysis

power optimization , Verification Methodologies, Mixed-Signal Integration, Timing Closure, Digital Circuit Design, Digital Architecture

Protocol knowledge (DDR, MIPI), Scripting (C/C++, Python), Pcie, Tcl, Perl, Micro-architecture design, SystemVerilog and Verilog coding, UVM/VMM/OVM verification methodologies, AMBA, Synthesis and static timing analysis

Wlan, Debugging Techniques, FPGA Development, C/C++ Programming, Verilog/SystemVerilog, Signal Processing, Synthesis Tools, Testbench Development, Rtl Design

Fpga, Matlab, ASIC, VHDL, Simulink