Perl, Python, RTL development environments, test bench infrastructure, low power verification, verification methodologies, system level performance analysis, emulation platforms, Uvm, automation scripts, systemverilog

I2c, Uart, Noc, Verilog, System Verilog, Pcie, Flash, Coresight, ARM cores, Uvm, AMBA bus protocols, NIC, ssd, System memory hierarchy, Multi-core SOC, DRAM, SSP, Digital ASIC design

redhawk , primetime, PDN methodology, floorplanning, physical design implementation, STA constraints, Cadence Innovus, Tempus, IR EM mitigation, Physical Verification, Voltus, PNR and signoff tools, Synopsys ICC2