Overview

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's Intelligent Cloud mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.

The Interface & Custom Circuit Engineering team in AI-Silicon Engineering is seeking experienced, passionate, driven, and intellectually curious Senior Analog Design Engineer who can work with cross-discipline teams (architecture, design, layout, verification, silicon-validation etc.) to develop High-speed Interface and analog-Mixed-Signal IPs for the SOCs of Microsoft. The ideal candidate is also. The ideal candidate is a self-starter, highly motivated engineer with excellent technical & interpersonal skills, used to working independently or as a key member of a fast-moving design

team. The candidate is passionate about quality and robustness in design and methodologies, innovative in problem solving.

Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

We're committed to a diverse and inclusive workplace and strongly encourage applicants from all backgrounds and walks of life. Difference makes us better.

#SCHIE INDIA

Responsibilities

The primary responsibility of this position is to lead Analog designs and delivery of cutting edge, high-performance, high-speed, low-power Analog IP designs for interconnectivity solutions and fundamental Analog circuit blocks for various Microsoft products in various process nodes including deep FinFet, following industry best practices. You will technically deliver complex blocks that will produce schematics, verify in simulation, complete timing/jitter/power budgets and work with mask layout teams to deliver a final IP GDS.

You will coordinate tasks with junior members of the team, develop plans for Analog IP execution, follow processes/methodologies to deliver IP blocks. You are a very hands-on contributor.
You are proficient in Analog and Mixed signal IC circuit designs, design validation simulations (pre and post-layout), follow checklists/presentation templates, supervise floor-planning and monitor layout progress. You will coordinate bench validation of IP in Silicon, and IP characterization on bench and tester. You will use established flows/methodologies/processes for execution.
You will work along with other members of the team to deliver IP's, including project planning, schedule tracking, report generation.
Interface with RTL, Verification and P&R team

Qualifications

You should have a BSEE or equivalent, MSEE/PhD preferred.
7+ years of experience in analog circuit design, through full cycle post BSEE or equivalent (higher degree holders with lower post academic experience may be considered).
Experience with high-speed analog front-end serdes or D2D design (preferably PCIe, UCIe, D-PHY, USB), data-converters, PLLs, Regulators and all associated blocks in analog designs from architecture till silicon validation support.
Experience in Design partitioning, power/jitter budgeting and timing analysis. Knowledge of lower power design techniques, calibration, parasitic extraction, EM/IR/ESD/Aging & Signal Integrity Design.
Experience with the use of CAD-tools (Cadence, Mentor, Synopsys) for circuit schematic entry, simulations, post layout extractions, Mixed-mode simulations
Delivered Analog IP's successfully in mass production in FinFET processes.
Experience in mentoring individual engineers.
Working with multiple stakeholders (arch/design/layout/silicon validation/project managers) to execute full design cycle till silicon.
Excellent communication skills and self-motivated that can collaborate with larger teams within Microsoft.
Energetic and self-motivated and innovative problem solver

Preferred

Scripting language such as Python, Perl
Matlab modelling
Exposure to RTL behavioral modelling of analog blocks will be a plus
Masters or PhD degree from premier institutes

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.??As a condition of employment, the successful candidate will be required?to provide either proof of their country of citizenship or proof of their US. residency or other protected status?(e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information.?To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

This req is open even for L63

This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

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