Uart, Dac, Usb, Verilog, Ethernet, Can, Spi, Pcie, Cadence Xcelium, Analog IPs, systemverilog, EDA Tools, SVA, assertions, power-aware simulations, security IPs, SoC-level verification, eSPI, Uvm, UPF, PLLs, gate-level simulations, ADC, Synopsys VCS, low-power verification, I²C, functional coverage, Flash Memory, constrained-random verification, ARM-based microcontrollers

Python Scripting, DDR, Noc, Pcie, Verilog, Vcs, UVM methodology, UCIe, Assembly Programming, systemverilog, Co-Simulation