C, Embedded Linux, Data structures, Soc Architecture, Algorithms, Object Oriented Programming, Assembly language debugging, Microcontrollers, Embedded tool chain, Caches, IP-XACT, System C TLM2.0, Pipeline, System C, Virtual Prototype tools, SystemC-AMS, ARM Fast Models, SystemRDL, BUS Protocols, MMU, Windriver SIMICS, Microprocessor, Synopsys Virtualizer

Pcie, Perl, Ethernet, Python, System Verilog, Axi, APB, RoCE, CXL, AMBA protocols, Uvm

simvision , Tcl, C, Vcs, Shell, Python, Questa, Uvm, systemverilog, Xcelium, Verdi, functional coverage, regression management, constrained-random verification, DVE

Ml, Tcl, Python, Perl, regression management, simulation coverage analysis, AMS Co-Simulation, Uvm, mixed-signal verification, systemverilog, Ai

Digital and Mixed-signal designs, FPGA characterization, Verilog or VHDL, Automated characterization flows