C, Perl, Verilog, Shell scripting, Python, Tcl, SVA, UVM assertions, systemverilog

C, Pcie, Ethernet, SV, CXL, Uvm, UCIe, systemverilog

Python, Tcl, Shell scripting, Debugging, Perl, Uvm, systemverilog, Mixed-Signal Verification

Asic verification, digital design verification, Uvm, test bench architecture, systemverilog, GIT version control, C Language