r related field and 2+ years of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Bachelor or Master degree from a top-tier institute.

6-11 years of experience in physical design from product-based companies.

Experience:

Proven experience in managing complex subsystems and small teams.
Proficiency in synthesis, place and route (PnR), and sign-off convergence, including Static Timing Analysis (STA) and sign-off optimizations.

Job Requirements

Expertise in meeting demanding Power, Performance, and Area (PPA) requirements for complex subsystems/System on Chips (SoCs), place and route, and IP integration.
Experience in low power design implementation, including Unified Power Format (UPF), multi-voltage domains, and power gating.
Familiarity with ASIC design flows and physical design methodologies.
Strong understanding of circuit design, device physics, and deep sub-micron technology.
Experience working on multiple technology nodes in advanced processes.
Proficiency in automation to drive improvements in PPA.

1a:T4ac,QUALCOMM CDMA Technologies (QCT) is the largest provider of 3G chipset and software technology in the world, with chipsets shipped to more than 50 customers and powering the majority of all 3G devices commercially available. QCT partners with nearly 60 3G network operators around the globe and has the largest CDMA engineering team in the wireless industry.
QCT provides complete chipset solutions and integrated applications from the Launchpad suite of advanced technologies. Our integrated solutions offer device manufacturers reduced bill-of-materials costs, time-to-market, and development time. Mobile handsets powered by QCT chipsets can offer more feature

SoC Physical Design Engineer