C, Verilog, Gdb, System Verilog, Python, Tcl, Zebu, Veloce, Palladium, waveform debuggers

Verilog, Basic understanding of power and performance, Emulation environments for pre-silicon prototyping, Programming In C, Timing closure techniques, Validation and debug of digital circuits, FPGA expertise, systemverilog, Pre-silicon enablement and bring-up, Debug tools including JTAG and kernel debuggers, CPU and SoC architectures, Debugging low level software and hardware issues, Intel FPGAs

C, Verilog, System Verilog, IP level ASIC verification, Writing and debugging testbenches, SOC design model build experience, Debugging firmware and RTL code using simulation tools, Hands-on experience on Zebu Palladium Veloce platform, CPU GPU and Memory subsystem, BIOS OS bring up on full X86 SOC emulation platform, Debugging SOC IO interfaces with Transactor solutions in Emulation platform, Understanding of PCIe USB Ethernet standards

C, Gdb, Python, Systemc, Emulation, qemu, Intel Simics, Simics Debugger

C, Vcs, Gdb, Spi, Pcie, Perl, Ethernet, I2c, Python, Tcl, ProtoCompiler, HAPS 80, ASIC Logic RTL Design, Palladium, FPGA prototyping, quartus, AMBA, Zebu, Vivado, Veloce, Modelsim, VPS

lauterbach , Assembly Language, C, Usb, Spi, Jtag, Pcie, Perl, Arm, Python, Tcl, Palladium, Coresight, Axi, Zebu, UltraSoC, LPDDR

Usb, Spi, DDR, Shell, Pcie, Perl, Pci, Sata, I2c, Ruby, System Verilog, Python, Tcl, Palladium, Axi, Emulation FPGA, Zebu

C, Verilog, Spirent, Ixia, Python, Tcl, Zebu, Palladium, systemverilog