Develop and execute test plans and conduct coverage-based design verification.

Collaborate with architecture, verification, and physical design teams to ensure timely delivery.

Utilize formal verification techniques and tools from Synopsys or similar vendors.

Apply knowledge of computer architecture and computer arithmetic to design tasks.

Leverage C/C++ programming for modeling, testing, or tool development as needed.

Contribute to projects involving DX9–DX12 level graphics hardware (OpenGL/DirectX APIs).

Minimum Qualifications:

Education:
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 4+ years of relevant experience.
OR Master's degree with 3+ years of experience.
OR PhD with 2+ years of experience.

Preferred Qualifications:

Master's degree in Computer Science, Electrical Engineering, or a related field.
Experience in DX9–DX12 level graphics hardware design.
Familiarity with SystemVerilog and ASIC industry tools.
Strong communication skills and ability to work collaboratively in a team environment.

Technologies & Tools:

Verilog, VHDL, SystemVerilog
Synopsys synthesis, STA, formal verification tools
C/C++ programming
OpenGL, DirectX, GPU architecture
ASIC design, DFT, low-power techniques

1a:T4ac,QUALCOMM CDMA Technologies (QCT) is the largest provider of 3G chipset and software technology in the world, with chipsets shipped to more than 50 customers and powering the majority of all 3G devices commercially available. QCT partners with nearly 60 3G network operators around the globe and has the largest CDMA engineering team in the wireless industry.
QCT pro

Graphics ASIC RTL Design Engineer - Sr. Engineer / Sr. Lead / Staff