As a Functional Verification Engineer at IBM

Verify different functions/Components of the Server Processor chip, Memory BIST or Reset Flow and Boot Firmware.

Your primary responsibilities include:

Work with logic and development teams to identify test scenarios, create test plans and execute the scenarios.
Create/Update the test environment and code automated test scenarios and environments.
Work with development and system tests team to ensure coverage criteria is met.
Create/Update formal verification rules for various functions in PCIe and PIPE specification.
Develop skills in IBM Functional verification tools and apply them successfully.

Required education

Preferred education

Required technical and professional expertise

5+ years of experience in pre-silicon functional verification
3+ years of experience in Memory BIST or Reset Flow/Boot Firmware
Good understanding of the hardware development cycle for the product
Expertise in Object Oriented Programming concepts using C++/System Verilog to design and develop reusable functional verification components
Good Understanding of VHDL or Verilog, and able to trace the source of unexpected design behaviour through to RTL source
Track record of defining new approaches to verification that are adopted by others and progress the state of the art of verification within a team
Expertise in automation language, tool and scripts – Python/Perl
Experience in test automation
Analytical skills, decision making ability and attention to details
Ability to work in a team, under schedule pressure and maintain deadlines
Development experience with Linux / Unix
Experience in Test Plan creation and develop test cases from the requirements & Design Documents, reviews, reports creation
Strong communication skills and passionate to work well as part of a team

Preferred technical and professional experience

Production Support

Anaplan