IR drop, digital design fundamentals, LVS, Cadence Innovus, Physical Verification, crosstalk, MMMC setup and hold closure, block-level timing analysis, physical design implementation, AI-assisted tools, DRC, EM noise, Synopsys IC Compiler II

Innovus, PnR Engineer

Place Route, RHSC tool, IR Power-Domain-Network signoff, EMIR signoff, Physical Implementation Synthesis, scripting – python

cadence encounter , Unix Linux, 14nm 10nm 7nm 5nm process nodes, Synopsys ICC2 tool set, Flow automation, PnR tools like ICC2 Innovus, SDC STA and Equivalence checking, SKILL Shell Python Script, Tapeout sign-off experience

Perl, Ruby, Blocklevel, Toplevel Physical implementation, Lower node technologies, EDA Tools