THE ROLE:

We are looking for an adaptive, self-motivative Synthesis/PD/STA engineer to join our growing team. As a key contributor, you will be part of a team to drive and improve AMDs abilities to deliver the highest quality, industry-leading technologies to market. The Physical Design Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and physical design in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

Collaborate with architects for the new features to be implemented in layout
End-to-end RTL to GDS implementation of complex IPs and supporting the SOC customers
Working with RTL team to resolve timing and congestion issues
Build and develop methodology to converge multiple PNR blocks from RTL to GDS
Analyze design metrics and make implementation choices to optimize PPA

PREFERRED EXPERIENCE:

ASIC design flow and direct experience with ASIC design in sub-7nm technology nodes
Circuit timing/STA, and practical experience with Prime Time or equivalent tools
Low power digital design and analysis
Expertise in synthesis and physical design flows
Modern SOC tools including Synopsys Fusion compiler, Primetime and Redhawk
TCL, Perl, Python scripting
Strong verbal and written communication skills
Ability to organize and present complex technical information
Fluent in working with Linux environment
4-5 years of industry experience

ACADEMIC CREDENTIALS:

Bachelors or Masters degree in computer engineering/Electrical Engineering

Sr. Silicon Design Engineer