Job Summary

Position: Sr. Post Silicon Validation Engineer

Location: Bangalore

Experience: 4 to 7 Years

Areas of Responsibility:

Architect, Design and Development of Firmware Components.
Identifying and understanding firmware requirements and defining features and functionality
Engaging in all phases of new product development, including concept, architecture, documentation and design, prototype
Complete design and development cycle from Conceptualization, detailed design, Models and design calculations
Evaluating firmware and system architectures, designs, implementation and assess system performance
Mentoring FW engineering teams in design and development of solutions
To be connected with current developments, competition, standards and Represent in standard bodies as necessary

Key Skills: C, Python, ARM, Firmware, Linux, FPGA, GIT,SVN, High speed IP's, AUDIOSS,ADC, Oscilloscope, DMM, Logic Analyzer and Protocol Analyzer, VT, I2C, SPI, USB

Experience:

4 to 7 years of experience

Experience in Programming Languages like C, Embedded C, Python Language
Need to be able to understand spec requirements and convert it into exhaustive test list.
Tuning Delta from Design Documentation into Validation Test Plan and Executing the test as per test plan.
Strong knowledge of structured code development methods and debug techniques.
Strong understanding of ARM architecture .
Good understanding of Hardware Schematics.
Need to have good understanding of JEDEC spec.
Effectively communicated with Design Engineers, Micro Architects and Team Members to ensure High Quality Test Plans.
Excellent capability to design and deploy efficient algorithms in firmware. In-depth understanding of firmware development processes/cycles.
Knowledge on protocols like AUDIOSS(Audio Subsystem), Communication IP's,High speed protocols.
Experience in usage of software tools like visual studio, beyond compare.
Experience in usage of Debugging tools like GHS,IAR Systems.
Experience in usage of Bug tracking and reporting tool like JIRA.
Extensively used version controller tool GIT and SVN.
Utilizing various Software and Hardware tools like Oscilloscope, DMM, Logic Analyzer and Protocol Analyzer,VT system to ensure high quality results.
Good experience in ARM exceptions , stack, registers and instruction sets.
Good exposure to working with simulations,palladium, FPGA environments, debug techniques.
Strong communication skills for effective collaboration with cross-functional teams.

Sr. Post Silicon Validation Engineer

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