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Key Responsibilities
Job ID: 148700035
Skills:
Verilog, System Verilog, Python, Ovm, Uvm, LLMs, ML technologies, formal verification, SV, EDA Tools
Skills:
C, Verilog, Tcl, System Verilog, Python, Perl, Microprocessor architecture, Assertions, UVM methodology, Metric Driven Verification, Constrained random methodologies, Formal verification methodologies, SoC Verification
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