639

Test Bench Jobs

Associate ASIC - FPGA Verification Engineer

Permanent Job

2-5 years

CVS Xcelium UVM methodology Subversion TB scratch development simvision ASIC VHDL Universal Verification Methodology Functional Coverage Verdi Ip Verification code coverage SS verification SVA Revision Control Systems Unix Fpga Vcs Verilog System Verilog Git Linux

3 days ago

IP Design Verification Engineer

Permanent Job

Bengaluru / Bangalore ,

India

1-2 years

computational logic design Uvm Digital Design systemverilog post-si bring-up HW-SW debug architecture Verification design verification methods Design Tools Hdl Ovm Scripting Languages Verilog Tcl System Verilog Perl

a day ago

CPU Physicial Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

4-6 years

VHDL Cadence Synopsys Perl Verilog Static Timing Analysis Python Tcl

a day ago

CPU Circuit Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

Synthesis VHDL P and R tools Perl Verilog Python Tcl

a day ago

CPU Circuit Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

Synthesis VHDL P and R tools Perl Verilog Python Tcl

a day ago

CPU Physicial Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

10-12 years

Synthesis CTS VHDL Post-Route Optimization Placement P and R tools Perl Verilog Python Tcl

a day ago

CPU Physicial Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

10-12 years

Synthesis CTS VHDL Post-Route Optimization Placement P and R tools Perl Verilog Python Tcl

a day ago

CPU Physicial Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

6-8 years

Synthesis CTS VHDL Post-Route Optimization Placement P and R tools Perl Verilog Python Tcl

a day ago

DFT Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

TAP Design Verification MBIST RTL Verdi wavefor m viewer VHDL DV Post Silicon/ATE Bring-Up Support ATPG IJTAG Vcs Verilog System Verilog

a day ago

CPU Circuit Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

3-5 years

VHDL Digital Design Perl Verilog Static Timing Analysis Python Tcl

a day ago

CPU Circuit Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

3-5 years

VHDL Digital Design Perl Verilog Static Timing Analysis Python Tcl

a day ago

CPU Physicial Design Engineer

Permanent Job

Bengaluru / Bangalore ,

India

10-12 years

Synthesis CTS VHDL Post-Route Optimization Placement P and R tools Perl Verilog Python Tcl

a day ago

DFT Engineer

Permanent Job

Bengaluru / Bangalore ,

India

5-7 years

Timing/SDF tester bring up TAP Design Verification RTL Mentor Unit delay GLS Dft VHDL DV IJTAG TestKompress Synthesis Timing MBIST ATPG coverage debug Post Silicon/ATE Bring-Up Support ATPG DRC Verdi wavefo rm viewer Siemens Tessent Shell Eda Vcs Verilog System Verilog

a day ago

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Job Category

Test Bench Jobs

Associate ASIC - FPGA Verification Engineer

IP Design Verification Engineer

CPU Physicial Design Engineer

CPU Circuit Design Engineer

CPU Circuit Design Engineer

CPU Physicial Design Engineer

CPU Physicial Design Engineer

CPU Physicial Design Engineer

DFT Engineer

CPU Circuit Design Engineer

CPU Circuit Design Engineer

CPU Physicial Design Engineer

DFT Engineer

CPU Physicial Design Engineer