Job Description
- Design of optimized digital blocks meeting functional, cost, and low power constraints and ensure spec compliance.
- Take over technical leadership for sub-systems or for complete digital system and drive from specification to production ramp.
- Develop TCL scripts and design constraints to perform synthesis, DFT insertion and static timing analysis.
- Support DFT strategy and implementation.
- Verification planning, feature extraction and verification test case development
- Interface with P&R for Digital hand-off and post layout verification
- Develop test vectors for production test.
- Instigate review meetings with design engineers.
- Perform physical silicon device evaluation where necessary.
- Develop work-around solutions where necessary to overcome device errata including documentation.
- Support RFQ process where necessary.
- Coach and mentor less experienced team members.
- Other specific tasks deemed reasonable by your manager, some of which will be set during annual performance review.
Key Performance Measures
- Deliver design work in the agreed time scales as set by program schedule for all assigned tasks.
- Pro-actively taking ownership of responsibilities.
- Accurate documentation and log all design work.
- Uses judgement within defined design guidelines and PDP to determine best action.
- Looks for continuous improvement in own and Dialog procedures, methodologies and
- Processes.
- Raises issues in a timely manner and proposes solutions.
- Quality of design and simulation in line with expectations in Principal accountabilities.
- Demonstrates good team spirit both in own team and cross functional teams.
- Proactively seek improvement in technical and non-technical skills and knowledge through self-development, course attendance and on the job training.
- Contribute to projects, programms and business initiatives through creativity and ingenuity.
Qualifications
- Typically, 5-8 years of experience.
- Degree level qualification in Electronics engineering or a related discipline typically required.
- Experience working in semiconductors, ideally PMIC with focus on mixed signal integrated circuits and low power digital design techniques.
- Fluent in either (System)Verilog or VHDL RTL coding and ASIC design methodology
- Proven ability to optimize and develop design architecture from chip inception through to compliant netlist.
- Proficiency in developing block and top-level timing constraints for STA and P&R signoff.
- Experience of scan insertion and ATPG generation
- Technical expert of industry standard tools and procedures.
- Ability to work with minimal instruction- either independently or collaboratively
- Ability to make good judgement in selecting method/technique for obtaining solutions.
- Able to confidently share own expertise and work to colleagues and customers.
- Able to make significant contributions to projects, programs and business initiatives through creativity and ingenuity.
- Results-oriented and able to deliver on-time under tight schedule.
- Ability to work both independently and part of a team.
- Flexible to undertake occasional international travel at short notice.
- Excellent command of verbal and written English
- Ability to propose innovative solutions.
- Concise and precise communication, interpersonal and customer skills within multisite and multicultural environment
