Senior Team Leader for Short Range Wireless VLSI system design

Bangalore

4-10 Years

Senior Team Leader for Short Range Wireless VLSI system design

B.E in ECE with industrial experience of 8+ years

Or

M.E in VLSI/Signal processing/Electronics with minimum 6 years of industrial experience

1. Excellent in micro-architecture and hands on RTL design (Verilog/VHDL) of complex logic blocks and subsystems.

2. Expertise in ASIC or FPGA design flows.

3. Exposure to system level simulation and Verilog based verification environment and scripting languages like Perl, Tcl or Python