- Team leadership with technical guidance and tracking and Verification planning;
- Verification test bench development, tuning and implementation.
- Development of verification test bench components such as drivers, monitors, response checkers as well as use most advanced UVM VIPs.
- Development of direct and constrained-random stimulus using c ,SV. Understands and analyzes RTL code, functional, assertion coverage results.
- Understands Develop functional coverage. Understands and develops system Verilog assertions.
- Understands and implements formal verification methods; Strong skills in debug, failure re-creation and root cause analysis.
- Applicant should have efficient debugging and logic skills.
Job Qualifications:
- C and UVM/SV based Test environment, and Understanding of the design/architecture and ability to debug RTL/Gate netlist is MUST
- Coverage driven Verification for addressing Functional, Performance requirement of the SoC, regression management
- Microcontroller architecture, ARM Cores, Interconnect (NIC, FlexNoC), Cache Coherency, and Bus Protocols like AHB/AMBA,AXI, ACE
Following skills will have additional value:
- Memory controllers (Flash, SRAM,DDR3/4/LPDDR)
- Protocols like PCIe, MIPI, GPU (Graphics processing), Ethernet, Serial / Quad flash
- Formal verification methodologies and Apps, AVIP, PinMuxing Verification, Randomization
- Low Power intent verification using UPF o Exposure to pre silicon validation/emulation (Veloce, Zebu)/FPGA Prototyping would be a plus.
