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Principal Software Engineer ( Verification )

Cadence
8-11 Years
Ahmedabad
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Job Description

Key Responsibilities

  • Design and develop Verification IP (VIP) using C/C++ and SystemVerilog/UVM.
  • Manage and maintain multiple VIP components.
  • Interact with customers to understand requirements and support VIP usage.
  • Contribute to protocol and formal verification methodology development.
  • Debug complex verification issues across IP and system-level environments.
  • Lead or mentor a small team of engineers.
  • Ensure high-quality VIP delivery aligned with Cadence standards. 

More Info

Job Type:
Permanent Job
Industry:
Software Engineering
Role:
Other Roles
Function:
Others
Employment Type:
Full time

About Company

Job ID: 148699145

Last Updated: 04-06-2026 07:24:12 AM
Homejobs in AhmedabadPrincipal Software Engineer ( Verification )

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Principal Software Engineer ( Verification )

Cadence
C
Ahmedabad

Skills:

Verification IP (VIP), C++, VIP Development, Functional Verification, systemverilog, SV, Uvm, Universal Verification Methodology, Protocol Verification, formal verification, Digital Electronics