Lead Software Engineer ( Verification )

Key Responsibilities

• Develop and enhance verification solutions using SystemVerilog, UVM, and software-driven methodologies.
• Build and maintain verification libraries for IP, subsystem, and SoC-level designs.
• Translate customer requirements into verification product enhancements and feature improvements.
• Support and debug customer issues related to verification environments and flows.
• Collaborate with cross-functional teams including Product Verification (PV), R&D, and field engineering teams.
• Work on SW-driven verification using embedded C and verification automation frameworks.
• Contribute to development of metric-driven verification environments and methodologies.
• Analyze complex verification problems and provide scalable technical solutions.
• Ensure smooth integration of verification solutions across different architectures and protocols.
• Participate in development of reusable, high-quality verification components.