DFT Practice Head

Job Title: DFT Practice Head

Location: Bengaluru, India

Experience: 12 to 16 years

Position Overview

The DFT Practice Head will lead the organization's Design for Test (DFT) competency, overseeing strategic direction, technology advancement, and team excellence. This leadership role will be responsible for building and strengthening DFT capabilities to support complex ASIC and SoC programs, ensuring quality, performance, and delivery excellence.

Key Responsibilities

• Define and implement the overall DFT strategy, methodology, and best practices across projects and teams.
• Lead and mentor a team of DFT engineers, fostering a culture of technical excellence and continuous learning.
• Drive execution of advanced DFT solutions, including scan insertion, ATPG, BIST (MBIST, LBIST), boundary scan, and fault simulation.
• Collaborate closely with design, verification, and physical design teams to ensure efficient system-level integration and validation.
• Establish strong partnerships with EDA vendors and engage in tool evaluations to optimize design and test flows.
• Contribute to business development through technical presentations, proposal support, and customer interactions.
• Manage project planning, resource allocation, and delivery governance to meet defined milestones and quality standards.
• Identify emerging trends in test technologies and integrate relevant advancements into organizational practices.

Required Qualifications

• Bachelor's or Master's degree in Electronics, Electrical, or VLSI Engineering.
• 12 to 16 years of hands-on experience in ASIC/SoC DFT implementation, methodology development, and team leadership.
• Strong expertise in scan, ATPG, memory and logic BIST, boundary scan, and test compression techniques.
• Proficiency in leading EDA tools such as Synopsys DFTC, Cadence Modus, or Siemens Tessent.
• Demonstrated capability to manage complex, multi-site DFT projects with strict quality and timeline objectives.
• Excellent leadership, communication, and stakeholder management skills.

Desired Skills

• Prior experience in establishing or scaling a DFT practice or center of excellence.
• Exposure to automotive-grade or safety-critical DFT flows (ISO 26262).
• Strong analytical and problem-solving abilities with a strategic outlook.

About us:

Silicon Patterns is a specialized engineering services company with deep expertise in pre-silicon and post-silicon design and verification. We deliver end-to-end semiconductor and embedded system solutions covering RTL Design, SystemC Modeling, Emulation, Design Verification (DV), Physical Design (PD), Design for Testability (DFT), and Pre- & Post-silicon Validation helping clients achieve faster, more reliable product development.

Headquartered in Hyderabad, with offices in Bangalore and Raipur, and supported by our skilled engineering teams in Malaysia, we serve global clients through flexible engagement models like Time & Materials (T&M), Offshore Development Centers (ODC), Subcontracting, and Build-Operate-Transfer (BOT).

Our expertise spans VLSI and Embedded Systems, with a strong focus on Wireless, IoT, and Automotive domains. We also work on advanced technologies including HBM3/3E workloads, AI/ML, GenAI/LLMs, and edge computing.

At Silicon Patterns, we're committed not only to technical excellence but also to maintaining a strong work-life balance for our teams because great engineering starts with well-supportedpeople.

https://www.siliconpatterns.com