technical compliance , System integration, Solution Design, Quality, ETO engineering, Application Engineering, Risk assessment methodologies, Engineering standards, Cooling technologies

Usb, Tcl, Verilog, Ethernet, Git, Ecos, C, Perforce, Python, Pcie, DDR, static RTL checks, Cadence Mentor simulation suites, Xilinx Vivado, systemverilog, Synthesis, Axi, FPGA design tools, Intel Quartus, low power design techniques, AMBA bus protocols, Rtl Design, Lattice Diamond, STA timing closure, SoC architectures