Analog IC Layout, Custom IC Design, Cadence Virtuoso, Advanced Node Technology, Physical Verification, EM/IR Analysis

virtuoso, foundry process methodology, Physical Verification, Cadence layout tools, Extraction, IC design technology, advance node layout and design rules, EMIR analysis, analog layout design fundamentals

MS PowerPoint, Cadence EMX EMXDesigner tools, layout verification DRC LVS, Spectre Circuit simulator, reliability checks ESD LUP, Ms Word, analog RF microwave design, Cadence Virtuoso, parasitic RC extraction PEX, Cadence Microwave Office AWR, post-layout simulation EM IR EMIR analysis, Analog Mixed-Signal Design