Cadence layout tools, Physical Verification, EDA workflow automation, Extraction, signoff, analog layout design fundamentals, virtuoso, foundry process methodology, Chip Integration, IC design technology, analog back-end flow, EMIR analysis, AI ML assisted tools

virtuoso, Physical Verification, EDA workflow automation, Cadence layout tools, Extraction, layout automation, signoff, skill scripts, analog layout design fundamentals, foundry process methodology, Chip Integration, IC design technology, analog back-end flow, EMIR analysis, AI ML assisted tools